Posts tagged fpga

ALINX AX7020, Stages 2 & 3: A Yocto Linux in QSPI Flash That Fetches Its Own Updates

August 31, 2026 fpga alinx zynq yocto linux u-boot kexec dropbear fit-image qspi embedded bring-up

Stages 2 and 3 of the open bitstream pipeline: a self-built Yocto Linux for the ALINX AX7020, resident in QSPI flash, discoverable on the company network, key-only SSH: the walkthrough that works, followed by the nine detours it took to get there.

ALINX AX7020 Bring-up: Mainline U-Boot Over JTAG, No FSBL, No Serial Cable

August 30, 2026 fpga alinx zynq jtag openocd u-boot spl device-tree netconsole bring-up linux

Stage 1 of the open bitstream pipeline: putting mainline U-Boot on an ALINX AX7020 over JTAG and Ethernet only: a clean walkthrough of what works, followed by the nine detours it took to find out.

Deploying Hardware Like Software: A Bitstream Pipeline for the Zynq

August 23, 2026 fpga embedded linux open-source

Alinx sent me an AX7020 board. Here is the plan: an open-source path from JTAG bring-up to a REST API that accepts a bitstream and loads it onto the FPGA, no vendor tools in the loop.

From Bitstream to Idea: An Inverse Guide to FPGAs

July 8, 2026 fpga open-source

The ghdl-yosys-nextpnr toolchain for an iCE40, walked backward: starting from a blinking LED and tracing every transformation back to the idea that caused it.

WTF are FPGAs: A Beginner's Overview of Field-Programmable Gate Arrays

June 15, 2026 fpga electronics education

FPGAs are not microcontrollers with more pins. They are a fundamentally different category of IC, and understanding what lives inside one changes how you think about digital hardware entirely.

Zero to One: VHDL and a Lattice iCEstick

May 14, 2026 fpga zero-to-one

A complete walkthrough of writing VHDL, simulating it with GHDL, and flashing a blinking LED onto a Lattice iCEstick — from zero assumptions to a physical result.

Tag: fpga