Freelance FPGA, Zynq, PCB & DAQ Engineering

I take on freelance engineering projects through my company nabla B in Bochum, Germany — on-site in the DACH region, remote worldwide, in English or German. From feasibility study to serial product, from “we need a prototype” to “our vendor toolchain is holding us hostage”.

Start a project: office@nabla-b.engineering · LinkedIn · Direct: stephan@boekelmann.net

What I do

FPGA & Zynq development. HDL design in VHDL/Verilog, Zynq-7000 PS/PL systems and AXI integration, board bring-up without vendor lock-in (mainline U-Boot SPL instead of FSBL, JTAG/OpenOCD), open toolchains (Yosys, nextpnr) as well as Vivado/Vitis where they are the right tool. The open Zynq bitstream pipeline on this blog shows the working style in public.

PCB design & bring-up. Schematic and layout in KiCad, multilayer, signal integrity, EMC preparation and certification support, hand-off to manufacturing — including supply-chain work with board and cable manufacturers in China and Europe, and wire bonding for bare-die prototypes.

Embedded firmware & Linux. Microcontroller firmware (bare-metal and RTOS), embedded Linux with Yocto, mainline U-Boot and mainline kernels, device trees, secure remote update paths, board support from power-on to SSH prompt.

Data acquisition & monitoring. Decentralised DAQ from the analog front-end through ADC and transport up to the server: sensor signal chains, high-throughput acquisition, time-stamping at the source, and the monitoring infrastructure that keeps production and research systems observable.

Typical deliverables

  • Schematic, layout, Gerber and assembly data, plus a bring-up report
  • A board that boots: bootloader, kernel, BSP, update mechanism — documented and reproducible
  • FPGA designs with constraints, testbenches and a CI-able build
  • A DAQ chain with defined accuracy, calibration procedure and data interface
  • Training for your team: I lecture at three universities and train engineers in digital measurement technology

Selected projects

  • Open Zynq bitstream deployment pipeline — JTAG bring-up to self-updating Yocto Linux on an ALINX AX7020, documented as a public series (since 2026)
  • PCB design for an embedded vision system with AI acceleration — customer under NDA (2026)
  • skAInet Edge-Compute — M12-PoE switch, router and Linux compute module for industrial edge DAQ by Auto-Intern; system architect, M12 cabling specification and EMC campaign (write-up) (2016–2026)
  • Reflow-oven monitoring for predictive solder-quality assessment — Kurtz Ersa, including EMC certification in China (2022–2026)
  • Electrochemical impedance spectroscope for biofilm detection in US rivers — with Montana State University (field report) (2023–2026)
  • HV-MAPS silicon-detector test stands and wire-bonding line — PANDA/FAIR, Ruhr-Universität Bochum (2020–2026)
  • skAInet / PowerSense critical-infrastructure monitoring — incl. DB Netz AG (ten-year retrospective) (2015–2025)

How working with me works

You contract with nabla B UG (Amtsgericht Bochum, HRB 18817). When a project needs more capacity, I bring in the AI-Gruppe companies I work with — the contract and the responsibility stay with nabla B. Professionally active since 2007; the full background, credentials and FAQ are on the about page, publications and patents on the publications page.

Get in touch

Write a few lines about your project — current state, what “done” looks like, timeline: