Tag: jtag

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ALINX AX7020, Stages 4 & 5: An Open Bitstream Over REST, and the One Missing Line That Hangs Both Cores

September 14, 2026 fpga alinx zynq yosys nextpnr prjxray openxc7 fpga-manager kexec fastapi rest-api yocto linux jtag openocd embedded bring-up

Stages 4 and 5 of the open bitstream pipeline: a Yosys/nextpnr bitstream loaded into the ALINX AX7020 through the kernel's FPGA manager, a kexec updater that finally runs, and a FastAPI service that accepts bitstreams over HTTP, all without a single vendor tool; then the detours, including a PL design that silently drowned both Cortex-A9 cores in FIQs.

ALINX AX7020 Bring-up: Mainline U-Boot Over JTAG, No FSBL, No Serial Cable

August 30, 2026 fpga alinx zynq jtag openocd u-boot spl device-tree netconsole bring-up linux

Stage 1 of the open bitstream pipeline: putting mainline U-Boot on an ALINX AX7020 over JTAG and Ethernet only: a clean walkthrough of what works, followed by the nine detours it took to find out.